#Fpga
Showing 38 of 38 repositories tagged #fpga, ranked by stars
PaddlePaddle High Performance Deep Learning Inference Engine for Mobile and Edge (飞桨高性能深度学习端侧推理引擎）
Machine learning on FPGAs using HLS
Brevitas: neural network quantization in PyTorch
PlatformIO IDE for VSCode: The next generation integrated development environment for IoT
An OpenCL-based FPGA Accelerator for Convolutional Neural Networks
Samples for Intel® oneAPI Toolkits
Dataflow compiler for QNN inference on FPGAs
:seedling: Open source ecosystem for open FPGA boards
HAL – The Hardware Analyzer
The OpenPiton Platform
A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.
Installs Vivado on M1/M2/M3 macs
QKeras: a quantization deep learning library for Tensorflow Keras
collection of works aiming at reducing model sizes or the ASIC/FPGA accelerator for machine learning
hBPF = eBPF in hardware
Open source machine learning accelerators
A Python library for converting images into FPGA-displayable pixel art.
FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)
Companion Jupyter Notebooks for the RFSoC-Book.
Small-scale Tensor Processing Unit built on an FPGA
Master AI inference, AI agent harness systems, and hardware engineering — then design a physical AI chip. That is the goal.
Binary Neural Network Framework for FPGA(Differentiable LUT)
A new Hardware Design Language that keeps you in the driver's seat
An Open Workflow to Build Custom SoCs and run Deep Models at the Edge
[MIGRATED to https://codeberg.org/prjunnamed/prjunnamed] End-to-end synthesis and P&R toolchain
OpenNNA2.0，一个基于C语言(C99)的开源神经网络推理框架
A fully automated, custom CPU and software stack for tiny embedded systems
MultiZone® Security TEE is the quick and safe way to add security and separation to any RISC-V processors. The RISC-V standard ISA doesn't define TrustZone-like primitives to provide hardware separation. To shield critical functionality from untrusted third-party components, MultiZone provides hardware-enforced, software-defined separation of multi
A Data-Centric Compiler for Machine Learning
FPGA-based LPC bus sniffing tool for Lattice iCEstick Evaluation Kit
Generic CNC firmware and driver for FPGA cards which are supported by LiteX
The SpinalHDL design of the Proteus core, an extensible RISC-V core.
An FPGA I/O Device which services physical memory reads/writes via UMDF2 driver
SmartMiner.PRO (SMP) - GUI Multi crypto mining panel for GPU/CPU/ASIC/FPGA
VT220-compatible console on Cyclone IV EP4CE55F23I7
A HARDWARE IMPLEMENTATION OF ARTIFICIAL NEURAL NETWORKS FOR INFERENCE
ReducedLUT: Table Decomposition with "Don't Care" Conditions [FPGA'25]
Verilog Convolutional Neural Network on PYNQ